In a multiprocessor computer system, a processor is placed into the debug mode of operation by halting its execution of programmed instructions. The processor then resolves internal conflicts, enters a steady state, and goes into the debug mode. A debug monitor program executes on the processor while the processor is in the debug mode to provide access to the internal resources of the processor. The internal resources of the processor may then be examined to debug the program or the processor hardware. Typically, contents of internal registers and memory locations of the processor are examined and possibly altered using the debug monitor. After the debug monitor completes execution, the processor is taken out of the debug mode and the processor resumes execution of program instructions, usually at the point where the execution of program instructions stopped as a result of the processor entering the debug mode.
The processor may enter the debug mode upon the occurrence of a debug event exception. There are many types of debug events which may occur during normal processing. Sometimes the normal programmed instructions include a debug breakpoint program instruction which causes the processor to enter the debug mode simply as a result of executing that debug breakpoint program instruction in the normal flow of executing the programmed instructions. Specific addresses and/or data values may be used as events which cause the processor to enter the debug mode when those addresses are accessed or the data is fetched. There are many other recognized ways to cause the processor to enter the debug mode.
When one of the processors in a multiprocessor computer system enters the debug mode, the other processors continue to execute program instructions unless they also encounter a debug event and enter the debug mode. However, most debug events incurred by the different processors of a multiprocessor system are generally unsynchronized and independent of each other. By the time that all processors have been stopped, the state of the processors will have advanced to the point that the use of the state extracted from these processors in the determination of the cause of the unexpected debug event is no longer valid. Consequently, it is extremely difficult or impossible to probe the state of the processors in order to evaluate the cause and effect of the debug event. All of the processors of a multiprocessor system should be placed into the debug mode at approximately the same time to perform accurate and meaningful evaluation of the debug event in which the internal resources of more than one processor are examined. Placing all of the processors into the debug mode at approximately the same time preserves the states of the processors at approximately the time when one of the processors enters the debug mode, and limits or prevents the other processors from continuing to execute normal program instructions.
The typical technique of placing the other processors of a multiprocessor system into the debug mode when one of the processors of the system encounters a debug event is to assert hardware interrupts under control of the debug monitor program of the processor which incurred the debug event. However, halting the other processors under control of the debug monitor program when one processor enters the debug mode may result in an excessive time delay before the other processors of the multiprocessor system can halt execution of their program instructions. During this time delay, the continued execution of the program instructions by the other processors does not adequately preserve, for debugging purposes, the state of the other processors at the time of the debug event. Because of the interrelationship in functionality and program execution of the processors of a multiprocessor system, it may be critical to preserve the state of each of the processors in order to determine the cause of a debug event which affected only one processor. The inability to preserve the state of all of the processors may inhibit, prevent or delay the determination of those conditions which caused the debug event to occur. Such impediments may greatly complicate the task of debugging a multiprocessor system.
It is with respect to these and other considerations that have given rise to the present invention.